HEIDR (STM) Register Description
| Register Name | HEIDR |
|---|---|
| Offset Address | 0x0000000DFC |
| Absolute Address | 0x00FE9C0DFC (CORESIGHT_SOC_STM) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x00000000 |
| Description | Read the features of hardware event tracing in STM. |
HEIDR (STM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| VENDSPEC | 11:8 | roRead-only | 0x0 | The VENDSPEC field identifies any vendor specific modifications or mappings: 0. |
| CLASSREV | 7:4 | roRead-only | 0x0 | The CLASSREV field identifies the revision of the programmers model: 1. |
| CLASS | 3:0 | roRead-only | 0x0 | The CLASS field identifies the programmers model: 1: control. |