| Field Name | Bits | Type | Reset Value | Description |
|---|
| Implementer | 31:24 | roRead-only | 0x41 | Implementer = A (for Arm). |
| Security | 19 | roRead-only | 0x0 | Security Extensions support. The ETM behaves as if the processor is in Secure state at all times. |
| Thumb2 | 18 | roRead-only | 0x1 | Thumb-2 support. All 32-bit Thumb instructions are traced as a single instruction, including BL and BLX immediate. |
| Load_PC_first | 16 | roRead-only | 0x0 | An LSMa load operation with the PC included in the load list, the PC is not loaded first. |
| Arm_family | 15:12 | roRead-only | 0xF | Arm processor family. The value of b1111 means that the processor family is defined elsewhere. |
| Arch_major | 11:8 | roRead-only | 0x2 | Major ETM architecture version number. A value of 0 in this field indicates ETMv1. |
| Arch_minor | 7:4 | roRead-only | 0x3 | Minor ETM architecture version number. |
| Revision | 3:0 | roRead-only | 0x2 | Implementation revision. Value given is for the r2p0 release of the macrocell. |