IDR1 (A53_ETM_1) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

IDR1 (A53_ETM_1) Register Description

Register NameIDR1
Offset Address0x00000001E4
Absolute Address 0x00FED401E4 (CORESIGHT_A53_ETM_1)
Width32
TyperoRead-only
Reset Value0x41000402
DescriptionID Register 1

IDR1 (A53_ETM_1) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
DESIGNER31:24roRead-only0x41Indicates which company designed the trace unit.
TRCARCHMAJ11:8roRead-only0x4Indicates the major version of the ETM architecture.
TRCARCHMIN 7:4roRead-only0x0Indicates the minor version of the ETM architecture.
REVISION 3:0roRead-only0x2Returns an IMPLEMENTATION DEFINED value that identifies the revision of the trace registers and the OS Save and Restore registers.Arm recommends:That the initial implementation sets REVISION==0x0 and the field then increments for any subsequent implementations. However, it is acceptable to omit some values or use another scheme to identify the revision number.That 2.REVISION==IDR1.REVISION. However, in situations where it is difficult to align these fields, such as with a metal layer fix, then it is acceptable to change the REVISION fields independently.