IDR_1 (AMS) Register Description
| Register Name | IDR_1 |
|---|
| Offset Address | 0x000000002C |
|---|
| Absolute Address |
0x00FFA5002C (AMS_CTRL)
|
|---|
| Width | 32 |
|---|
| Type | mixedMixed types. See bit-field details. |
|---|
| Reset Value | 0x00000000 |
|---|
| Description | Interrupt Disable, Reg 1. |
|---|
0: no effect. 1: disable interrupt (sets mask = 1). Write-only.
IDR_1 (AMS) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| addr_decode_err | 31 | woWrite-only | 0x0 | AMS_CTRL Register Access Error. |
| addr_decode_err_pl_sysmon | 30 | woWrite-only | 0x0 | PLSYSMON Register Access Error. |
| addr_decode_err_ps_sysmon | 29 | woWrite-only | 0x0 | PSSYSMON Register Access Error. |
| Reserved | 28:5 | roRead-only | 0x0 | reserved |
| eos | 4 | woWrite-only | 0x0 | PS SysMon End-of-Sequence (EOS). |
| eoc | 3 | woWrite-only | 0x0 | PS SysMon End-of-Conversion (EOC). |
| pl_ot | 2 | woWrite-only | 0x0 | PL over-temperature (OT) alarm. |
| ps_lpd_ot | 1 | woWrite-only | 0x0 | LPD over-temperature (OT) alarm. |
| ps_fpd_ot | 0 | woWrite-only | 0x0 | FPD over-temperature (OT) alarm. |