ID_AA64DFR0_EL1_31to0 (A53_DBG_2) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ID_AA64DFR0_EL1_31to0 (A53_DBG_2) Register Description

Register NameID_AA64DFR0_EL1_31to0
Offset Address0x0000000D28
Absolute Address 0x00FEE10D28 (CORESIGHT_A53_DBG_2)
Width32
TyperoRead-only
Reset Value0x10305106
DescriptionDebug Feature Register 0 (low word)

ID_AA64DFR0_EL1_31to0 (A53_DBG_2) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
CTX_CMPs31:28roRead-only0x1Number of breakpoints that are context-aware, minus 1. These are the highest numbered breakpoints.
WRPs23:20roRead-only0x3Number of watchpoints, minus 1. The value of 0b0000 is reserved.
BRPs15:12roRead-only0x5Number of breakpoints, minus 1. The value of 0b0000 is reserved.
PMUVer11:8roRead-only0x1Performance Monitors extension version. Indicates whether system register interface to Performance Monitors extension is implemented. Permitted values are:All other values are reserved.
TraceVer 7:4roRead-only0x0Trace extension. Indicates whether system register interface to Trace extension is implemented. Permitted values are:All other values are reserved.A value of 0b0000 only indicates that no system register interface to the trace extension is implemented. A trace extension may nevertheless be implemented without a system register interface.
DebugVer 3:0roRead-only0x6Debug architecture version. Indicates presence of v8-A debug architecture.All other values are reserved.