ID_ISAR3 (R5_DBG_1) Register Description
| Register Name | ID_ISAR3 |
|---|---|
| Offset Address | 0x0000000D4C |
| Absolute Address | 0x00FEBF2D4C (CORESIGHT_R5_DBG_1) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x01112131 |
| Description | ISA Feature Register 3 |
ID_ISAR3 (R5_DBG_1) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Thumb_EE_extension | 31:28 | roRead-only | 0x0 | Indicates support for ThumbEE Execution Environment extension. 0x0= no support. |
| True_NOP | 27:24 | roRead-only | 0x1 | Indicates support for true NOPinstructions. 0x1= the processor supports NOP16, NOP32and various NOPcompatible hints in both the Arm and Thumb instruction sets. |
| Thumb_copy | 23:20 | roRead-only | 0x1 | Indicates support for Thumb copy instructions. 0x1= the processor supports Thumb MOV(3) low register ?low register. |
| Table_branch | 19:16 | roRead-only | 0x1 | Indicates support for table branch instructions. 0x1= the processor supports table branch instructions, TBB and TBH. |
| Sync_primitive | 15:12 | roRead-only | 0x2 | Indicates support for synchronization primitive instructions. 0x2= the processor supports: . LDREX and STREX . LDREXB, LDREXH, LDREXD, STREXB, STREXH, STREXD, and CLREX |
| SVC | 11:8 | roRead-only | 0x1 | Indicates support for SVC(formerly SWI) instructions. 0x1= the processor supports SVC. |
| SIMD | 7:4 | roRead-only | 0x3 | Indicates support for Single Instruction Multiple Data(SIMD) instructions. 0x3= the processor supports: PKHBT, PKHTB, QADD16, QADD8, QASX, QSUB16, QSUB8, QSAX, SADD16, SADD8, SASX, SEL, SHADD16, SHADD8, SHASX, SHSUB16, SHSUB8, SHSAX, SSAT, SSAT16, SSUB16, SSUB8, SSAX, SXTAB16, SXTB16, UADD16, UADD8, UASX, UHADD16, UHADD8, UASX, UHSUB16, UHSUB8, USAX, UQADD16, UQADD8, UQASX, UQSUB16, UQSUB8, UQSAX, USAD8, USADA8, USAT, USAT16, USUB16, USUB8, USAX, UXTAB16, UXTB16, and the GE[3:0] bits in the PSRs. |
| Saturate | 3:0 | roRead-only | 0x1 | Indicates support for saturate instructions. 0x1= the processor supports QADD, QDADD, QDSUB, QSUBand Q flag in PSRs. |