IER (CAN) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

IER (CAN) Register Description

Register NameIER
Offset Address0x0000000020
Absolute Address 0x00FF060020 (CAN0)
0x00FF070020 (CAN1)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionInterrupt Enable

IER (CAN) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:15rwNormal read/write0x0Reserved
ETXFEMP14rwNormal read/write0x0Enable TXFIFO Empty Interrupt
Writes to this bit enable or disable interrupts when the TXFEMP bit in the ISR is set.
1: Enable interrupt generation if TXFEMP bit in ISR is set.
0: Disable interrupt generation if TXFEMP bit in ISR is set.
ETXFWMEMP13rwNormal read/write0x0Enable TXFIFO watermark Empty Interrupt
Writes to this bit enable or disable interrupts when the TXFWMEMP bit in the ISR is set.
1: Enable interrupt generation if TXFWMEMP bit in ISR is set.
0: Disable interrupt generation if TXFWMEMP bit in ISR is set.
ERXFWMFLL12rwNormal read/write0x0Enable RXFIFO watermark Full Interrupt
Writes to this bit enable or disable interrupts when the RXFLL bit in the ISR is set.
1: Enable interrupt generation if RXFWMFLL bit in ISR is set.
0: Disable interrupt generation if RXFWMFLL bit in ISR is set.
EWKUP11rwNormal read/write0x0Enable Wake up Interrupt
Writes to this bit enable or disable interrupts when the WKUP bit in the ISR is set.
1: Enable interrupt generation if WKUP bit in ISR is set.
0: Disable interrupt generation if WKUP bit in ISR is set.
ESLP10rwNormal read/write0x0Enable Sleep Interrupt
Writes to this bit enable or disable interrupts when the SLP bit in the ISR is set.
1: Enable interrupt generation if SLP bit in ISR is set.
0: Disable interrupt generation if SLP bit in ISR is set.
EBSOFF 9rwNormal read/write0x0Enable Bus OFF Interrupt
Writes to this bit enable or disable interrupts when the BSOFF bit in the ISR is set.
1: Enable interrupt generation if BSOFF bit in ISR is set.
0: Disable interrupt generation if BSOFF bit in ISR is set.
EERROR 8rwNormal read/write0x0Enable Error Interrupt
Writes to this bit enable or disable interrupts when the ERROR bit in the ISR is set.
1: Enable interrupt generation if ERROR bit in ISR is set.
0: Disable interrupt generation if ERROR bit in ISR is set.
ERXNEMP 7rwNormal read/write0x0Enable Receive FIFO Not Empty Interrupt
Writes to this bit enable or disable interrupts when the RXNEMP bit in the ISR is set.
1: Enable interrupt generation if RXNEMP bit in ISR is set.
0: Disable interrupt generation if RXNEMP bit in ISR is set.
ERXOFLW 6rwNormal read/write0x0Enable RX FIFO Overflow Interrupt
Writes to this bit enable or disable interrupts when the RXOFLW bit in the ISR is set.
1: Enable interrupt generation if RXOFLW bit in ISR is set.
0: Disable interrupt generation if RXOFLW bit in ISR is set.
ERXUFLW 5rwNormal read/write0x0Enable RX FIFO Underflow Interrupt
Writes to this bit enable or disable interrupts when the RXUFLW bit in the ISR is set.
1: Enable interrupt generation if RXUFLW bit in ISR is set.
0: Disable interrupt generation if RXUFLW bit in ISR is set.
ERXOK 4rwNormal read/write0x0Enable New Message Received Interrupt
Writes to this bit enable or disable interrupts when the RXOK bit in the ISR is set.
1: Enable interrupt generation if RXOK bit in ISR is set.
0: Disable interrupt generation if RXOK bit in ISR is set.
ETXBFLL 3rwNormal read/write0x0Enable High Priority Transmit Buffer Full Interrupt
Writes to this bit enable or disable interrupts when the TXBFLL bit in the ISR is set.
1: Enable interrupt generation if TXBFLL bit in ISR is set.
0: Disable interrupt generation if TXBFLL bit in ISR is set.
ETXFLL 2rwNormal read/write0x0Enable Transmit FIFO Full Interrupt
Writes to this bit enable or disable interrupts when TXFLL bit in the ISR is set.
1: Enable interrupt generation if TXFLL bit in ISR is set.
0: Disable interrupt generation if TXFLL bit in ISR is set.
ETXOK 1rwNormal read/write0x0Enable Transmission Successful Interrupt
Writes to this bit enable or disable interrupts when the TXOK bit in the ISR is set.
1: Enable interrupt generation if TXOK bit in ISR is set.
0: Disable interrupt generation if TXOK bit in ISR is set.
EARBLST 0rwNormal read/write0x0Enable Arbitration Lost Interrupt
Writes to this bit enable or disable interrupts when the ARBLST bit in the ISR is set.
1: Enable interrupt generation if ARBLST bit in ISR is set.
0: Disable interrupt generation if ARBLST bit in ISR is set.