INIT4 (DDRC) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

INIT4 (DDRC) Register Description

Register NameINIT4
Offset Address0x00000000E0
Absolute Address 0x00FD0700E0 (DDRC)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionSDRAM Initialization Register 4

INIT4 (DDRC) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
emr231:16rwNormal read/write0x0DDR3/DDR4: Value to write to MR2 register
LPDDR3/LPDDR4: Value to write to MR3 register
Programming Mode: Quasi-dynamic Group 4
emr315:0rwNormal read/write0x0DDR3/DDR4: Value to write to MR3 register
LPDDR4: Value to write to MR13 register
Programming Mode: Quasi-dynamic Group 2 and Group 4