ISR_0 (AMS) Register Description
Register Name | ISR_0 |
---|---|
Offset Address | 0x0000000010 |
Absolute Address | 0x00FFA50010 (AMS_CTRL) |
Width | 32 |
Type | wtcReadable, write a 1 to clear |
Reset Value | 0x00000000 |
Description | Alarm Interrupt Status and Clear, Reg 0. PS and PL. |
The first half of this register are alarms for the PS. The second half are for the PL. Bits are set by hardware and cleared by PMU software by writing a 1 to a bit. READ: 0: no alarm. 1: alarm latched. WRITE: 0: no effect. 1: clear the bit. The threshold and sequence control registers are described in the PSSYSMON and PLSYSMON register sets.
ISR_0 (AMS) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
pl_alm_15 | 31 | wtcReadable, write a 1 to clear | 0x0 | PL Sensor Alarms -- OR of bits [29:16]. |
pl_alm_14 | 30 | wtcReadable, write a 1 to clear | 0x0 | reserved |
pl_alm_13 | 29 | wtcReadable, write a 1 to clear | 0x0 | reserved |
pl_alm_12 | 28 | wtcReadable, write a 1 to clear | 0x0 | PL ADC voltage, VCCADC. |
pl_alm_11 | 27 | wtcReadable, write a 1 to clear | 0x0 | PL VUser3. |
pl_alm_10 | 26 | wtcReadable, write a 1 to clear | 0x0 | PL VUser2. |
pl_alm_9 | 25 | wtcReadable, write a 1 to clear | 0x0 | PL VUser1. |
pl_alm_8 | 24 | wtcReadable, write a 1 to clear | 0x0 | PL VUser0. |
pl_alm_7 | 23 | wtcReadable, write a 1 to clear | 0x0 | PL Sensor Alarms -- OR of bits [22:16]. |
pl_alm_6 | 22 | wtcReadable, write a 1 to clear | 0x0 | VCC_PSAUX |
pl_alm_3 | 19 | wtcReadable, write a 1 to clear | 0x0 | VCCBRAM. |
pl_alm_2 | 18 | wtcReadable, write a 1 to clear | 0x0 | PL VCCAUX |
pl_alm_1 | 17 | wtcReadable, write a 1 to clear | 0x0 | PL VCCINT |
pl_alm_0 | 16 | wtcReadable, write a 1 to clear | 0x0 | PL temperature |
ps_alm_15 | 15 | wtcReadable, write a 1 to clear | 0x0 | PS Sensor Alarms -- OR of bits [13:0]. |
ps_alm_14 | 14 | wtcReadable, write a 1 to clear | 0x0 | reserved |
ps_alm_13 | 13 | wtcReadable, write a 1 to clear | 0x0 | FPD temperature. |
ps_alm_12 | 12 | wtcReadable, write a 1 to clear | 0x0 | VCC_PSADC voltage. |
ps_alm_11 | 11 | wtcReadable, write a 1 to clear | 0x0 | PS_MGTRAVTT voltage (supply10). |
ps_alm_10 | 10 | wtcReadable, write a 1 to clear | 0x0 | PS_MGTRAVCC voltage (supply9). |
ps_alm_9 | 9 | wtcReadable, write a 1 to clear | 0x0 | VCCO_PSIO2 I/O bank 502, MIO[52:77]. |
ps_alm_8 | 8 | wtcReadable, write a 1 to clear | 0x0 | VCCO_PSIO1 I/O bank 501, MIO[26:51]. |
ps_alm_7 | 7 | wtcReadable, write a 1 to clear | 0x0 | PS Sensor Alarms -- OR of bits [6:0]. |
ps_alm_6 | 6 | wtcReadable, write a 1 to clear | 0x0 | VCCO_PSIO0 I/O bank 500, MIO[0:25]. |
ps_alm_5 | 5 | wtcReadable, write a 1 to clear | 0x0 | VCCO_PSIO3 I/O bank 503, boot mode, serial config, JTAG, error output, error status, SRST, POR. |
ps_alm_4 | 4 | wtcReadable, write a 1 to clear | 0x0 | VCCO_PSDDR, bank 504, DDR I/O. |
ps_alm_3 | 3 | wtcReadable, write a 1 to clear | 0x0 | VCCO_PSAUX auxiliary power supply for BPU, eFuse, GPIOB logic. |
ps_alm_2 | 2 | wtcReadable, write a 1 to clear | 0x0 | FPD internal voltage, VCC_PSINTFP. |
ps_alm_1 | 1 | wtcReadable, write a 1 to clear | 0x0 | LPD internal voltage, VCC_PSINTLP. |
ps_alm_0 | 0 | wtcReadable, write a 1 to clear | 0x0 | LPD temperature. |