ITATBMCTR0 (ETF4K) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ITATBMCTR0 (ETF4K) Register Description

Register NameITATBMCTR0
Offset Address0x0000000EDC
Absolute Address 0x00FE940EDC (CORESIGHT_SOC_ETF_1)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionThe Integration Test ATB Master Interface Control Register 0 enables control of the ATBYTESM, AFREADYM and ATVALIDM outputs of the TMC. Writing to this register other than when in Disabled state (TraceCaptEn=0 and TMCReady=1) and in integration mode results in Unpredictable behavior.

ITATBMCTR0 (ETF4K) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
ATBYTESM 9:8woWrite-only0x0Control the value of ATBYTESM output from TMC. The value written to this field is driven on the ATBYTESM output of the TMC.
AFREADYM 1woWrite-only0x0Set the value of AFREADYM output
ATVALIDM 0woWrite-only0x0Set the value of ATVALIDM output