ITCTRL (A53_DBG_3) Register Description
| Register Name | ITCTRL |
|---|---|
| Offset Address | 0x0000000F00 |
| Absolute Address | 0x00FEF10F00 (CORESIGHT_A53_DBG_3) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | External Debug Integration mode Control Register |
ITCTRL (A53_DBG_3) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| IME | 0 | rwNormal read/write | 0x0 | Integration mode enable. When IME == 1, the device reverts to an integration mode to enable integration testing or topology detection. The integration mode behavior is IMPLEMENTATION DEFINED. |