ITCTRL (REPLIC) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ITCTRL (REPLIC) Register Description

Register NameITCTRL
Offset Address0x0000000F00
Absolute Address 0x00FE960F00 (CORESIGHT_SOC_REPLIC)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionUsed to enable topology detection. See the CoreSight Architecture Specification for more information. This register enables the component to switch from a functional mode, the default behavior, to integration mode where the inputs and outputs of the component can be directly controlled for integration testing and topology solving. Note: When a device has been in integration mode, it might not function with the original behavior. After performing integration or topology detection, you must reset the system to ensure correct behavior of CoreSight and other connected system components that are affected by the integration or topology detection.

ITCTRL (REPLIC) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Integration_mode 0rwNormal read/write0x0Enables the component to switch from functional mode to integration mode and back. If no integration functionality is implemented, this register must read as zero.