ITTRFLINACK (TPIU) Register Description
| Register Name | ITTRFLINACK |
|---|---|
| Offset Address | 0x0000000EE4 |
| Absolute Address | 0x00FE980EE4 (CORESIGHT_SOC_TPIU) |
| Width | 32 |
| Type | woWrite-only |
| Reset Value | 0x00000000 |
| Description | The Integration Test Trigger In and Flush In Acknowledge Register enables control of the triginack and flushinack outputs from the TPIU. |
ITTRFLINACK (TPIU) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| flushinack | 1 | woWrite-only | 0x0 | Set the value of flushinack. |
| triginack | 0 | woWrite-only | 0x0 | Set the value of triginack. |