LAR (CTI) Register Description
| Register Name | LAR |
|---|---|
| Offset Address | 0x0000000FB0 |
| Absolute Address |
0x00FEBF8FB0 (CORESIGHT_R5_CTI_0) 0x00FEBF9FB0 (CORESIGHT_R5_CTI_1) 0x00FE990FB0 (CORESIGHT_SOC_CTI_0) 0x00FE9A0FB0 (CORESIGHT_SOC_CTI_1) 0x00FE9B0FB0 (CORESIGHT_SOC_CTI_2) |
| Width | 32 |
| Type | woWrite-only |
| Reset Value | 0x00000000 |
| Description | This is used to enable write access to device registers. External accesses from a debugger (paddrdbg31 = 1) are not subject to the Lock Registers. A debugger does not have to unlock the component in order to write and modify the registers in the component. |
LAR (CTI) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| KEY | 31:0 | woWrite-only | 0 | A write of 0xC5ACCE55 enables further write access to this device. A write of any value other than 0xC5ACCE55 will have the affect of removing write access. |