LAR (STM) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

LAR (STM) Register Description

Register NameLAR
Offset Address0x0000000FB0
Absolute Address 0x00FE9C0FB0 (CORESIGHT_SOC_STM)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionEnables write access to device registers.

LAR (STM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
KEY31:0woWrite-only0A write of C5AC_CE55h enables further write access to this device. An invalid write has the affect of removing write access.