LOCK (XMPU_DDR) Register Description
Register Name | LOCK |
---|---|
Offset Address | 0x0000000020 |
Absolute Address |
0x00FD000020 (DDR_XMPU0_CFG) 0x00FD010020 (DDR_XMPU1_CFG) 0x00FD020020 (DDR_XMPU2_CFG) 0x00FD030020 (DDR_XMPU3_CFG) 0x00FD040020 (DDR_XMPU4_CFG) 0x00FD050020 (DDR_XMPU5_CFG) |
Width | 1 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Register Write Lock. |
All register writes must be done by a secure bus master as defined by TrustZone. The write lock prevents the secure master from writing to all registers except the status registers: ISR, IMR, IEN and IDS. Note: all XMPU registers are readable by secure bus masters. Note: regardless of the LOCK [RegWrDis] setting, the status registers are always writeable by secure and non-secure bus masters.
LOCK (XMPU_DDR) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
RegWrDis | 0 | rwNormal read/write | 0x0 | Register Write Disable. Applies to all registers except ISR, IMR, IEN and IDS. 0: read/write allowed. 1: read-only. Once this bit is set, it can only be cleared by an DDR_XMPU reset. |