LSR (A53_PMU_1) Register Description
Register Name | LSR |
---|---|
Offset Address | 0x0000000FB4 |
Absolute Address | 0x00FED30FB4 (CORESIGHT_A53_PMU_1) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000003 |
Description | Performance Monitors Lock Status Register |
LSR (A53_PMU_1) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
nTT | 2 | roRead-only | 0x0 | Not thirty-two bit access required. RAZ. |
SLK | 1 | roRead-only | 0x1 | Software lock status for this component. |
SLI | 0 | roRead-only | 0x1 | Software lock implemented. |