MIDR (R5_DBG_1) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

MIDR (R5_DBG_1) Register Description

Register NameMIDR
Offset Address0x0000000D00
Absolute Address 0x00FEBF2D00 (CORESIGHT_R5_DBG_1)
Width32
TyperoRead-only
Reset Value0x411FC153
DescriptionMain ID Register

MIDR (R5_DBG_1) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Implementer31:24roRead-only0x41Implementer Indicates implementer. 0x41= Arm Limited.
Variant23:20roRead-only0x1Variant Identifies the major revision of the processor. This is the major revision number nin the rnpart of the rnpndescription of the product revision status.
Architectur19:16roRead-only0xFArchitecture Indicates the architecture version. 0xF = see feature registers.
Primary_part_number15:4roRead-only0xC15Primary part number Indicates processor part number. 0xC15= Cortex-R5.
Revision 3:0roRead-only0x3Revision Identifies the minor revision of the processor. This is the minor revision number nin the pnpart of the rnpndescription of the product revision status.