MISCOUT (R5_ETM_1) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

MISCOUT (R5_ETM_1) Register Description

Register NameMISCOUT
Offset Address0x0000000EDC
Absolute Address 0x00FEBFDEDC (CORESIGHT_R5_ETM_1)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionMiscellaneous Outputs Register

MISCOUT (R5_ETM_1) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
EXTOUT 9:8rwNormal read/write0x0Drives the EXTOUT[1:0] output pins.
ETMWFIREADY 5rwNormal read/write0x0Drives the nETMWFIREADY output pin.
ETMDBGRQ 4rwNormal read/write0x0Drives the ETMDBGRQ output pin.