MON_STATUS (AMS) Register Description
Register Name | MON_STATUS |
---|---|
Offset Address | 0x0000000050 |
Absolute Address | 0x00FFA50050 (AMS_CTRL) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | ADC SysMon status. |
MON_STATUS (AMS) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:24 | roRead-only | 0x0 | reserved |
jtag_locked | 23 | roRead-only | 0x0 | SysMon Invalid Clock Indicator. 0: clocking okay. 1: invalid clock frequency. The ADC clock frequency must not be less than 1 MHz and not exceed 26 MHz. Also, the ams_ref_clk must not exceed 52 MHz. |
busy | 22 | roRead-only | 0x0 | ADC busy indicator. 0: idle. 1: busy (or calibration is occurring). This bit will read 1 for an extended period of time during the ADC and sensor calibrations. |
channel | 21:16 | roRead-only | 0x0 | Current sensor channel. Refer to table in UG1085 for a list of channels. |
mon_data | 15:0 | roRead-only | 0x0 | Value generated by ADC for source selected by the MON_STATUS [channel] field. |