MPUIR (R5_DBG_1) Register Description
Register Name | MPUIR |
---|---|
Offset Address | 0x0000000D10 |
Absolute Address | 0x00FEBF2D10 (CORESIGHT_R5_DBG_1) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000C00 |
Description | MPU Type Register |
MPUIR (R5_DBG_1) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
DRegion | 15:8 | roRead-only | 0xC | Specifies the number of unified MPU regions. Set to 0, 12, or 16 data MPU regions. |
S | 0 | roRead-only | 0x0 | Specifies the type of MPU regions, unified or separate, in the processor. Always set to 0, the processor has unified memory regions |