MR12 (DDR_PHY) Register Description
Register Name | MR12 |
Offset Address | 0x00000001B0 |
Absolute Address |
0x00FD0801B0 (DDR_PHY)
|
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x0000004D |
Description | LPDDR4 Mode Register 12 |
MR12 (DDR_PHY) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
Reserved | 31:8 | roRead-only | 0x0 | Reserved. Return zeroes on reads. |
RSVD | 7 | rwNormal read/write | 0x0 | These are JEDEC reserved bits and are recommended by JEDEC to be programmed to 0x0. |
VR_CA | 6 | rwNormal read/write | 0x1 | VREF_CA Range Select. |
VREF_CA | 5:0 | rwNormal read/write | 0xD | Controls the VREF(ca) levels for Frequency-Set-Point[1:0]. |
Alternate Register MR12_DDR3, reset=0x4d
Alternate Register Field: RSVD Offset=0 Width=16 read-write
[[*]] Description: These are JEDEC reserved bits and are recommended by JEDEC to be programmed to 0x0.
Alternate Register Field: RESERVED_31_16 Offset=16 Width=16 read-only
[[*]] Description: Reserved. Return zeroes on reads.
Alternate Register Field: RSVD Offset=0 Width=16 read-write
[[*]] Description: These are JEDEC reserved bits and are recommended by JEDEC to be programmed to 0x0.
Alternate Register Field: RESERVED_31_16 Offset=16 Width=16 read-only
[[*]] Description: Reserved. Return zeroes on reads.
Alternate Register Field: RSVD Offset=0 Width=16 read-write
[[*]] Description: These are JEDEC reserved bits and are recommended by JEDEC to be programmed to 0x0.
Alternate Register Field: RESERVED_31_16 Offset=16 Width=16 read-only
[[*]] Description: Reserved. Return zeroes on reads.
Alternate Register Field: RSVD Offset=0 Width=16 read-write
[[*]] Description: These are JEDEC reserved bits and are recommended by JEDEC to be programmed to 0x0.
Alternate Register Field: RESERVED_31_16 Offset=16 Width=16 read-only
[[*]] Description: Reserved. Return zeroes on reads.