MR3 (DDR_PHY) Register Description
Register Name | MR3 |
Offset Address | 0x000000018C |
Absolute Address |
0x00FD08018C (DDR_PHY)
|
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000031 |
Description | LPDDR4 Mode Register 3 |
MR3 (DDR_PHY) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
Reserved | 31:8 | roRead-only | 0x0 | Reserved. Return zeroes on reads. |
DBIWR | 7 | rwNormal read/write | 0x0 | DBI-Write Enable |
DBIRD | 6 | rwNormal read/write | 0x0 | DBI-Read Enable |
PDDS | 5:3 | rwNormal read/write | 0x6 | Pull-down Drive Strength |
RSVD | 2 | rwNormal read/write | 0x0 | These are JEDEC reserved bits and are recommended by JEDEC to be programmed to 0x0. |
WRPST | 1 | rwNormal read/write | 0x0 | Write Postamble Length |
PUCAL | 0 | rwNormal read/write | 0x1 | Pull-up Calibration Point |
Alternate Register MR3_DDR3, reset=0x31
Alternate Register Field: MPRLOC Offset=0 Width=2 read-write
[[*]] Description: Multi-Purpose Register (MPR) Location
Alternate Register Field: MPR Offset=2 Width=1 read-write
[[*]] Description: Multi-Purpose Register Enable
Alternate Register Field: RSVD Offset=3 Width=13 read-write
[[*]] Description: These are JEDEC reserved bits and are recommended by JEDEC to be programmed to 0x0.
Alternate Register Field: RESERVED_31_16 Offset=16 Width=16 read-only
[[*]] Description: Reserved. Return zeroes on reads.
Alternate Register Field: MPRPSEL Offset=0 Width=2 read-write
[[*]] Description: Multi-Purpose Register (MPR) Page Selection
Alternate Register Field: MPRO Offset=2 Width=1 read-write
[[*]] Description: Multi-Purpose Operation
Alternate Register Field: GDM Offset=3 Width=1 read-write
[[*]] Description: Geardown Mode
Alternate Register Field: PDA Offset=4 Width=1 read-write
[[*]] Description: Per DRAM Addressability
Alternate Register Field: TSR Offset=5 Width=1 read-write
[[*]] Description: Temp sensor readout
Alternate Register Field: FGRM Offset=6 Width=3 read-write
[[*]] Description: Fine Granularity Refresh Mode
Alternate Register Field: WCL Offset=9 Width=2 read-write
[[*]] Description: Write Command Latency when CRC and DM are enabled
Alternate Register Field: MPRRF Offset=11 Width=2 read-write
[[*]] Description: Multi-Purpose Register Read Format
Alternate Register Field: RSVD Offset=13 Width=3 read-write
[[*]] Description: These are JEDEC reserved bits and are recommended by JEDEC to be programmed to 0x0.
Alternate Register Field: RESERVED_31_16 Offset=16 Width=16 read-only
[[*]] Description: Reserved. Return zeroes on reads.
Alternate Register Field: DS Offset=0 Width=4 read-write
[[*]] Description: Drive Strength
Alternate Register Field: RSVD Offset=4 Width=12 read-write
[[*]] Description: These are JEDEC reserved bits and are recommended by JEDEC to be programmed to 0x0.
Alternate Register Field: RESERVED_31_16 Offset=16 Width=16 read-only
[[*]] Description: Reserved. Return zeroes on reads.
Alternate Register Field: DS Offset=0 Width=4 read-write
[[*]] Description: Drive Strength
Alternate Register Field: RSVD Offset=4 Width=12 read-write
[[*]] Description: These are JEDEC reserved bits and are recommended by JEDEC to be programmed to 0x0.
Alternate Register Field: RESERVED_31_16 Offset=16 Width=16 read-only
[[*]] Description: Reserved. Return zeroes on reads.