MSGF_DMA_STATUS (AXIPCIE_MAIN) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

MSGF_DMA_STATUS (AXIPCIE_MAIN) Register Description

Register NameMSGF_DMA_STATUS
Offset Address0x0000000460
Absolute Address 0x00FD0E0460 (AXIPCIE_MAIN)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionDMA Interrupt Status.

MSGF_DMA_STATUS (AXIPCIE_MAIN) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:1roRead-only0x0
msgf_dma_status 0roRead-only0x0DMA Interrupt Status. msgf_dma_status == 1 when one or more DMA interrupts are active. msgf_dma_status is cleared by clearing the associated DMA Channel AXI Interrupt Status registers.