MSGF_LEG_STATUS (AXIPCIE_MAIN) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

MSGF_LEG_STATUS (AXIPCIE_MAIN) Register Description

Register NameMSGF_LEG_STATUS
Offset Address0x0000000420
Absolute Address 0x00FD0E0420 (AXIPCIE_MAIN)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionLegacy Interrupt Status.

MSGF_LEG_STATUS (AXIPCIE_MAIN) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:4roRead-only0x0
msgf_leg_status_intd 3roRead-only0x0msgf_leg_status_intd is generated from received PCIe Assert_INTD and Deassert_INTD messages.
msgf_leg_status_intd will clear only when all INTD interrupt sources have been serviced and their interrupt status registers cleared.
msgf_leg_status_intc 2roRead-only0x0msgf_leg_status_intc is generated from received PCIe Assert_INTC and Deassert_INTC messages.
msgf_leg_status_intc will clear only when all INTC interrupt sources have been serviced and their interrupt status registers cleared.
msgf_leg_status_intb 1roRead-only0x0msgf_leg_status_intb is generated from received PCIe Assert_INTB and Deassert_INTB messages.
msgf_leg_status_intb will clear only when all INTB interrupt sources have been serviced and their interrupt status registers cleared.
msgf_leg_status_inta 0roRead-only0x0msgf_leg_status_inta is generated from received PCIe Assert_INTA and Deassert_INTA messages.
msgf_leg_status_inta will clear only when all INTA interrupt sources have been serviced and their interrupt status registers cleared.