MSGF_MSI_STATUS_LO (AXIPCIE_MAIN) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

MSGF_MSI_STATUS_LO (AXIPCIE_MAIN) Register Description

Register NameMSGF_MSI_STATUS_LO
Offset Address0x0000000440
Absolute Address 0x00FD0E0440 (AXIPCIE_MAIN)
Width32
TypewtcReadable, write a 1 to clear
Reset Value0x00000000
DescriptionMSI Interrupt Status[31:0].

MSGF_MSI_STATUS_LO (AXIPCIE_MAIN) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
msgf_msi_status31:0wtcReadable, write a 1 to clear0x0MSI Interrupt Per Vector Status. msgf_msi_status[i] is set to 1 when a MSI interrupt with vector i is received.