MSGF_RX_FIFO_ADDRESS_LO (AXIPCIE_MAIN) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

MSGF_RX_FIFO_ADDRESS_LO (AXIPCIE_MAIN) Register Description

Register NameMSGF_RX_FIFO_ADDRESS_LO
Offset Address0x0000000490
Absolute Address 0x00FD0E0490 (AXIPCIE_MAIN)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionReceived Message/Interrupt Address[31:0].

MSGF_RX_FIFO_ADDRESS_LO (AXIPCIE_MAIN) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
address_lo31:0roRead-only0x0When intr_type == Received MSI-X/MSI Interrupt
[31:0] is Address[31:0] of the received MSI-X/MSI write TLP.
When intr_type == Received Message
[31:24] is Byte 12 of Message TLP.
[23:16] is Byte 13 of Message TLP.
[15:8]
is Byte 14 of Message TLP.
[7:0]
is Byte 15 of Message TLP.