MSGF_RX_FIFO_LEVEL (AXIPCIE_MAIN) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

MSGF_RX_FIFO_LEVEL (AXIPCIE_MAIN) Register Description

Register NameMSGF_RX_FIFO_LEVEL
Offset Address0x0000000480
Absolute Address 0x00FD0E0480 (AXIPCIE_MAIN)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionReceived Interrupt and Message FIFO - Level

MSGF_RX_FIFO_LEVEL (AXIPCIE_MAIN) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:8roRead-only0x0
level 7:0roRead-only0x0Received Interrupt and Message FIFO - Level.
When non-0 there are received interrupts or messages pending. The oldest received Interrupt/Message contents are available by reading the msgf_rx_fifo_type/msg/address_lo/address_hi/data regsisters. When finished reading the current Interrupt/Message, the current element is removed from the FIFO by writing to the msgf_rx_fifo_pop register.