MSGF_RX_FIFO_TYPE (AXIPCIE_MAIN) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

MSGF_RX_FIFO_TYPE (AXIPCIE_MAIN) Register Description

Register NameMSGF_RX_FIFO_TYPE
Offset Address0x0000000488
Absolute Address 0x00FD0E0488 (AXIPCIE_MAIN)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionReceived Interrupt and Message FIFO - Message/Interrupt Type

MSGF_RX_FIFO_TYPE (AXIPCIE_MAIN) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
requester_id31:16roRead-only0x0PCI Express Requester ID captured from the ingress PCIe TLP.
Format is {Bus[7:0], Function[7:0]} for sources supporting PCI Express Alternative Routing ID (ARI) and {Bus[7:0], Device[4:0], Function[2:0]} for non-ARI PCIe sources.
Reserved15:4roRead-only0x0
Reserved 3roRead-only0x0reserved
received_msi_x_interrupt 2rwNormal read/write0x0Received MSI-X Interrupt
received_msi_interrupt 1rwNormal read/write0x0Received MSI Interrupt
received_message 0rwNormal read/write0x0Received Message