Max_OT_Register_S2 (CCI400) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

Max_OT_Register_S2 (CCI400) Register Description

Register NameMax_OT_Register_S2
Offset Address0x0000003110
Absolute Address 0x00FD6E3110 (CCI_GPV)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionMax_OT_Register_S2

Max_OT_Register_S2 (CCI400) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Int_OT_AR29:24rwNormal read/write0x0Integer part of the maximum outstanding AR addresses S2
Frac_OT_AR23:16rwNormal read/write0x0Fractional part of the maximum outstanding AR addresses S2
Int_OT_AW13:8rwNormal read/write0x0Integer part of the maximum outstanding AW addresses S2
Frac_OT_AW 7:0rwNormal read/write0x0Fractional part of the maximum outstanding AW addresses S2