OSLSR (A53_ETM_3) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

OSLSR (A53_ETM_3) Register Description

Register NameOSLSR
Offset Address0x0000000304
Absolute Address 0x00FEF40304 (CORESIGHT_A53_ETM_3)
Width32
TyperoRead-only
Reset Value0x0000000A
DescriptionOS Lock Status Register

OSLSR (A53_ETM_3) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PRESENT 3roRead-only0x1Indicates whether the OS Lock is implemented.This bit is RES1, which indicates that the OS Lock is always implemented.
BIT32 2roRead-only0x0Indicates that software must perform a 32-bit write.
LOCKED 1roRead-only0x1OS Lock status bit: When the trace unit core power domain is powered down the value is UNKNOWN. The
indicates if the trace unit core power domain is powered down.