PCTRL_4 (DDRC) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

PCTRL_4 (DDRC) Register Description

Register NamePCTRL_4
Offset Address0x0000000750
Absolute Address 0x00FD070750 (DDRC)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionPort 4 Control Register

This register is dynamic. Dynamic registers can be written at any time during operation.

PCTRL_4 (DDRC) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
port_en 0rwNormal read/write0x0Enables port 4.