PDSR (R5_ETM_1) Register Description
Register Name | PDSR |
---|---|
Offset Address | 0x0000000314 |
Absolute Address | 0x00FEBFD314 (CORESIGHT_R5_ETM_1) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000001 |
Description | Power-Down Status Register |
PDSR (R5_ETM_1) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Sticky_reg | 1 | rwNormal read/write | 0x0 | Sticky Register State. ETM-R5 does not support multiple power domains. |
Powered_up | 0 | rwNormal read/write | 0x1 | ETM Powered Up. The ETM Trace registers are accessible. ETM-R5 does not support multiple power domains. |