PIDR0 (TPIU) Register Description
Register Name | PIDR0 |
---|---|
Offset Address | 0x0000000FE0 |
Absolute Address | 0x00FE980FE0 (CORESIGHT_SOC_TPIU) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | Part of the set of Peripheral Identification registers. Contains part of the designer specific part number. |
PIDR0 (TPIU) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
PART_0 | 7:0 | roRead-only | 0x0 | Bits [7:0] of the components part number. This is selected by the designer of the component. |