PIDR2 (FTM) Register Description
| Register Name | PIDR2 |
|---|---|
| Offset Address | 0x0000000FE8 |
| Absolute Address | 0x00FE9D0FE8 (CORESIGHT_SOC_FTM) |
| Width | 8 |
| Type | roRead-only |
| Reset Value | 0x00000009 |
| Description | Peripheral ID2 |
PIDR2 (FTM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| ID | 7:0 | roRead-only | 0x9 | [7:4] is Revision (from Xilinx Revision[2:0]) [3] indicates JEP106 value is used [2:0] is JEP106 Identity [6:4] (from Xilinx ID[10:8]) |