PIDR3 (FTM) Register Description
| Register Name | PIDR3 |
|---|---|
| Offset Address | 0x0000000FEC |
| Absolute Address | 0x00FE9D0FEC (CORESIGHT_SOC_FTM) |
| Width | 8 |
| Type | roRead-only |
| Reset Value | 0x00000000 |
| Description | Peripheral ID3 |
PIDR3 (FTM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| ID | 7:0 | roRead-only | 0x0 | [7:4] is RevAnd [3:0] is Customer Mod (from Xilinx device_code[3:0]) |