PIDR7 (A53_PMU_1) Register Description
Register Name | PIDR7 |
---|---|
Offset Address | 0x0000000FDC |
Absolute Address | 0x00FED30FDC (CORESIGHT_A53_PMU_1) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | Performance Monitors Peripheral Identification Register 4 |
PIDR7 (A53_PMU_1) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:0 | roRead-only | 0x0 | reserved |