PIDR7 (TSGEN) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

PIDR7 (TSGEN) Register Description

Register NamePIDR7
Offset Address0x0000000FDC
Absolute Address 0x00FE900FDC (CORESIGHT_SOC_TSGEN)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionReserved

PIDR7 (TSGEN) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
_31:0rwNormal read/write0x0reserved