PL2_THR_CNT (CRL_APB) Register Description
| Register Name | PL2_THR_CNT |
|---|---|
| Offset Address | 0x00000000E4 |
| Absolute Address | 0x00FF5E00E4 (CRL_APB) |
| Width | 16 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | PL Clock 2 Threshold Count Value. |
PL2_THR_CNT (CRL_APB) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| LAST_CNT | 15:0 | rwNormal read/write | 0x0 | The number of clocks after receiving a trigger that the clocks should stop |