PLLCR1 (DDR_PHY) Register Description
| Register Name | PLLCR1 |
|---|---|
| Offset Address | 0x000000006C |
| Absolute Address | 0x00FD08006C (DDR_PHY) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | PLL Control Register 1 (Type B PLL Only) |
PLLCR1 (DDR_PHY) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| PLLPROG | 31:16 | rwNormal read/write | 0x0 | Connects to the PLL PLL_PROG bus. Reserved. Set to 0x0000. |
| Reserved | 15:6 | roRead-only | 0x0 | Reserved. Return zeroes on reads |
| BYPVREGCP | 5 | rwNormal read/write | 0x0 | Bypass PLL vreg_cp |
| BYPVREGDIG | 4 | rwNormal read/write | 0x0 | Bypass PLL vreg_dig. |
| LOCKPS | 2 | rwNormal read/write | 0x0 | Lock Detector Phase Select. Connects to pin LOCK_PHASE_SEL on the PLL. |
| LOCKCS | 1 | rwNormal read/write | 0x0 | Lock Detector Counter Select. Connects to pin LOCK_COUNT_SEL on the PLL. |
| LOCKDS | 0 | rwNormal read/write | 0x0 | Lock Detector Select. Connects to pin LOCK_DET_SEL on the PLL on the PLL. |