PLL_STATUS (CRF_APB) Register Description
Register Name | PLL_STATUS |
---|---|
Offset Address | 0x0000000044 |
Absolute Address | 0x00FD1A0044 (CRF_APB) |
Width | 8 |
Type | roRead-only |
Reset Value | 0x00000038 |
Description | FPD PLL Clocking Status. |
PLL_STATUS (CRF_APB) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
VPLL_STABLE | 5 | roRead-only | 0x1 | VPLL stability status. 0: not locked or bypassed. 1: locked or bypassed. |
DPLL_STABLE | 4 | roRead-only | 0x1 | DPLL stability status. 0: not locked or bypassed. 1: locked or bypassed. |
APLL_STABLE | 3 | roRead-only | 0x1 | APLL stability status. 0: not locked or bypassed. 1: locked or bypassed. |
VPLL_LOCK | 2 | roRead-only | 0x0 | VPLL lock status. 0: not locked. 1: locked. |
DPLL_LOCK | 1 | roRead-only | 0x0 | DPLL lock status. 0: not locked. 1: locked. |
APLL_LOCK | 0 | roRead-only | 0x0 | APLL lock status. 0: not locked. 1: locked. |