PL_CTRL_STATUS (AMS) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

PL_CTRL_STATUS (AMS) Register Description

Register NamePL_CTRL_STATUS
Offset Address0x0000000044
Absolute Address 0x00FFA50044 (AMS_CTRL)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionPL SysMon register access control status.

PL_CTRL_STATUS (AMS) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:1roRead-only0x0reserved
accessible 0roRead-only0Indicator for PS ability to access PL SysMon registers. Read-only.
0: not accessible.
1: accessible.