PORT_TYPE (DDR_QOS_CTRL) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

PORT_TYPE (DDR_QOS_CTRL) Register Description

Register NamePORT_TYPE
Offset Address0x0000000000
Absolute Address 0x00FD090000 (DDR_QOS_CTRL)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x0000A845
DescriptionSet Port Type Register

PORT_TYPE (DDR_QOS_CTRL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:16razRead as zero0x0Reserved for future use
PORT5_TYPE15:14rwNormal read/write0x2Set Port 5 Type
00 - Best Effort
01 - Low Latency
10 - Video traffic
11 - Reserved
PORT4_TYPE13:12rwNormal read/write0x2Set Port 4 Type
00 - Best Effort
01 - Low Latency
10 - Video traffic
11 - Reserved
PORT3_TYPE11:10rwNormal read/write0x2Set Port 3 Type
00 - Best Effort
01 - Low Latency
10 - Video traffic
11 - Reserved
PORT2B_TYPE 9:8rwNormal read/write0x0Set Port 2 Blue Queue Type
00 - Best Effort
01 - Low Latency
10 - Video traffic
11 - Reserved
PORT2R_TYPE 7:6rwNormal read/write0x1Set Port 2 Red Queue Type
00 - Best Effort
01 - Low Latency
10 - Video traffic
11 - Reserved
PORT1B_TYPE 5:4rwNormal read/write0x0Set Port 1 Blue Queue Type
00 - Best Effort
01 - Low Latency
10 - Video traffic
11 - Reserved
PORT1R_TYPE 3:2rwNormal read/write0x1Set Port 1 Red Queue Type
00 - Best Effort
01 - Low Latency
10 - Video traffic
11 - Reserved
PORT0_TYPE 1:0rwNormal read/write0x1Set Port 0 Type
00 - Best Effort
01 - Low Latency
10 - Video traffic
11 - Reserved