Field Name | Bits | Type | Reset Value | Description |
PMU_Count_Num | 15:11 | roRead-only | 0x4 | Number of PMU counters available |
DP | 5 | rwNormal read/write | 0x0 | Disables cycle counter, CCNT, if non-invasive debug is prohibited |
EX | 4 | rwNormal read/write | 0x0 | Enable export of the events to the event bus, EVNTBUS, for an external monitoring block to trace events. |
CCD | 3 | rwNormal read/write | 0x0 | Cycle count divider |
CCR | 2 | woWrite-only | 0x0 | Reset cycle counter |
RST | 1 | woWrite-only | 0x0 | Reset all performance counters, not including CCNT |
CEN | 0 | rwNormal read/write | 0x0 | Enable all counters |