Priority_Ctrl_Reg (FUNNEL4P) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

Priority_Ctrl_Reg (FUNNEL4P) Register Description

Register NamePriority_Ctrl_Reg
Offset Address0x0000000004
Absolute Address 0x00FE920004 (CORESIGHT_SOC_FUNN_1)
0x00FE930004 (CORESIGHT_SOC_FUNN_2)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionThe Priority Control Register defines the order in which inputs are selected. Each 3-bit field represents a priority for each particular slave interface. Location 0 has the priority value for the first slave port. Location 1 is the priority value for the second slave port, Location 2 is the third, down to location 7, which has the priority value of the eighth slave port. Values represent the priority value for each port number. If you want to give highest priority to a particular slave port, the corresponding port must be programmed with the lowest value. Typically this is likely to be a port that has more important data or that has a small FIFO and is therefore likely to overflow.
If you want to give lowest priority to a particular slave port, the corresponding slave port must be programmed with the highest value. Typically this is likely to be a device that has a large FIFO that is less likely to overflow or a source that has information that is of lower importance.

Priority_Ctrl_Reg (FUNNEL4P) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PriPort311:9rwNormal read/write0x0Priority value of the 4th port.
PriPort2 8:6rwNormal read/write0x0Priority value of the 3rd port.
PriPort1 5:3rwNormal read/write0x0Priority value of the 2nd port.
PriPort0 2:0rwNormal read/write0x0Priority value of the first slave port. The value written into this location is the value that you want to assign the first slave port.