Field Name | Bits | Type | Reset Value | Description |
Reserved | 31:11 | razRead as zero | 0x0 | Reserved for future use |
DDRC_WR_POISON | 10 | wtcReadable, write a 1 to clear | 0x0 | Write poison interrupt status from DDRC. ORd of Write poison interrupt from all XPIs. Program DDRC.POISONCFG.wr_poison_intr_en to enables/disables interrupts for write transaction poisoning. Use DDRC.POISONSTAT status register to find which XPI cause transaction poisoning. |
DDRC_RD_POISON | 9 | wtcReadable, write a 1 to clear | 0x0 | Read poison interrupt status from DDRC. ORd of Read poison from all XPIs. Program DDRC.POISONCFG.rd_poison_intr_en to enables/disables interrupts for read transaction poisoning. Use DDRC.POISONSTAT status register to find which XPI cause transaction poisoning. |
MRR_DATA_VALID | 8 | wtcReadable, write a 1 to clear | 0x0 | When asserted high, indicates that data on DDR_QOS_CTRL.DDRC_MRR_DATA* is valid. |
PC_COPY_DONE | 7 | wtcReadable, write a 1 to clear | 0x0 | Generate interrupt when copy happened in Performance Counters |
DFI_ALT_ERR | 6 | wtcReadable, write a 1 to clear | 0x0 | This interrupt is asserted when a parity or CRC error is detected on the DFI interface. |
DFI_ALT_ERR_MAX | 5 | wtcReadable, write a 1 to clear | 0x0 | This interrupt is asserted when the DDRC.CRCPARSTAT.dfi_alert_err_cnt reaches it maximum value, and the interrupt is enabled by DDRC.CRCPARCTL0.dfi_alert_err_int_en. |
DFI_ALT_ERR_FTL | 4 | wtcReadable, write a 1 to clear | 0x0 | This interrupt is asserted when a parity error due to MRS is detected on the DFI interface. |
DFI_INIT_COMP | 3 | wtcReadable, write a 1 to clear | 0x0 | PHY Initialization Complete Indication |
DDRECC_UNCRERR | 2 | wtcReadable, write a 1 to clear | 0x0 | When an uncorrectable ECC error is detected by DDRC |
DDRECC_CORERR | 1 | wtcReadable, write a 1 to clear | 0x0 | When a correctable ECC error is detected by DDRC |
INV_APB | 0 | wtcReadable, write a 1 to clear | 0x0 | APB (register) access occurs to an unimplemented space |