R03_END (XMPU_FPD) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

R03_END (XMPU_FPD) Register Description

Register NameR03_END
Offset Address0x0000000134
Absolute Address 0x00FD5D0134 (FPD_XMPU_CFG)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionRegion 3 End Address.

Refer to R00_END for more information.

R03_END (XMPU_FPD) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:28roRead-only0x0reserved
ADDR27:0rwNormal read/write0x0Bits [27:0] correspond to address bits [39:12].