RRPHI (ETR) Register Description
| Register Name | RRPHI |
|---|---|
| Offset Address | 0x0000000038 |
| Absolute Address | 0x00FE970038 (CORESIGHT_SOC_ETR) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | In the ETR configuration, memory addresses are 40 bits wide. The RAM Read Pointer High Register sets the upper 8 bits of the read pointer that is used (together with the contents of the RRP register) to read entries from the trace memory over the APB interface. See the RRP register for further details. |
RRPHI (ETR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| RRPHI | 7:0 | rwNormal read/write | 0x0 | Bits[39:32] of the read pointer |