RSCTLR8 (A53_ETM_3) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

RSCTLR8 (A53_ETM_3) Register Description

Register NameRSCTLR8
Offset Address0x0000000220
Absolute Address 0x00FEF40220 (CORESIGHT_A53_ETM_3)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionResource Selection Control Registers 8

RSCTLR8 (A53_ETM_3) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PAIRINV21rwNormal read/write0Controls whether the combined result from a resource pair is inverted
INV20rwNormal read/write0Controls whether the resource that GROUP and SELECT selects is inverted.
GROUP19:16rwNormal read/write0x0Selects a group of resources.
SELECT15:0rwNormal read/write0x0Selects one or more resources from the group that the GROUP field selects. Each bit represents a resource from the selected group.