RST_FPD_APU (CRF_APB) Register Description
| Register Name | RST_FPD_APU |
|---|---|
| Offset Address | 0x0000000104 |
| Absolute Address | 0x00FD1A0104 (CRF_APB) |
| Width | 24 |
| Type | rwNormal read/write |
| Reset Value | 0x00003D0F |
| Description | Software Controlled APU MPCore Resets. |
RST_FPD_APU (CRF_APB) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| acpu3_pwron_reset | 13 | rwNormal read/write | 0x1 | APU core3 POR reset. |
| acpu2_pwron_reset | 12 | rwNormal read/write | 0x1 | APU core2 POR reset. |
| acpu1_pwron_reset | 11 | rwNormal read/write | 0x1 | APU core1 POR reset. |
| acpu0_pwron_reset | 10 | rwNormal read/write | 0x1 | APU core0 POR reset. |
| Reserved | 9 | rwNormal read/write | 0x0 | reserved |
| apu_l2_reset | 8 | rwNormal read/write | 0x1 | L2 Cache reset. |
| acpu3_reset | 3 | rwNormal read/write | 0x1 | APU core3 system reset. |
| acpu2_reset | 2 | rwNormal read/write | 0x1 | APU core2 system reset. |
| acpu1_reset | 1 | rwNormal read/write | 0x1 | APU core1 system reset. |
| acpu0_reset | 0 | rwNormal read/write | 0x1 | APU core0 system reset. |